@Ari Wasch

BMS

• BMS documentation

• Started looking into BMS rev 3

• Reach out to Waterloop about their BMS design

@Chealsie Bains (Deactivated)

Jetson Carrier

• Update on Jetson Carrier layout & stackup?

@Farris Matar

PDB/BMS

• No progress on PDBMS debugging - should have an update next week

• Helped create wire harnesses for RS422 breakout + encoder

• Started improvements to design review process - part review guide complete

• Continue debugging PDBMS

• Continue improvements to design review process - start schematic review guide

• Organize design ideas into specific projects

@Ivan Lim

Science

• Components arrived, pcb shipped

• Finishing

@Jason Gao

RS422

BLDC motor controller

• Update on BLDC layout?

@Logan Hartford

Multiphase buck converter

• Spec'ed out a power resitor set-up to test the buck

• Added MOSFET and IC power dissipation to my calculations sheet

• Looked in to some different options for fixing the IC power dissipation issue

• Finished calculations for performance testing

• Researched how to improve performance

• Worked on making harnesses with Farris

• With our current set up we could get away with one fet per channel to reduce IC power loss

• Finding a fet with lower Qgate and a lower enough RDS could really improve efficency

• Order power resistors?

• Continiue to do some research on how to improve the current design.

• See if I can find an all around better performing MOSFET and then buy some

• Prepare for Rev2 Layout

@Taylor Mcnabb

SPI LVDS

• Update on SPI LVDS Host and Peripheral boards (layout/shipping)?

@Wolfgang Windholtz (Deactivated)

Science

exams

exams