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Test Plan (Black Baseboards)
Test Plan (Black Baseboards)
Post-Assembly
Check all required components are assembled and DNP components are not assembled
Verify components oriented correctly (polarity, pin 1 designators, etc.)
Verify there are no bridges between parts/pins creating unwanted shorts
Verify general soldering quality - no stray solder, burns, etc., all pins and pads connected with enough solder
Unpowered Tests
Verify power rails are not shorted to GND or with each other
Verify EN/RST/SHDN pins are not shorted to either GND or a power rail, unless it is supposed to be
Verify communication protocol lines (i.e. SDA & SCL for I2C, MISO MOSI SCLK & CS for SPI, etc.) are not shorted with each other, with a power rail, or GND
Basic Powered Tests
NOTE: Please keep track of ANY problems or issues you discover in the list at the bottom of this document
General:
Electrical | Firmware |
---|---|
Power onboard, look at the board with thermal camera, take a picture and post it in this document Verify all ICs, details, LEDs, etc. are powered on successfully Do a full system test with all of the rails powered and make sure nothing explodes Verify the TVS diode function protects against overvoltage on analog lines | Program the STM with blank code Verify the LED works Drive each of the diodes individually and together Verifty the PWM outputs for the LED matrix Check that a PWM signal is being generated with an osciliscope Verify that data can be sent out via CAN Just send a dummy message and look at it on a scope and make sure it looks reasonable |
48V Power:
Electrical | Firmware |
---|---|
Verify the 48V outputs can be enabled and disabled via N-CH FET (can draw load from the output when enabled, can’t otherwise) Can pull the gate of the FET manually or using firmware Verify the analog output of the amplifier matches expectations for a given the current draw Record the results Verify the TVS diode function protects against an oversimplification of signal | Verify the enable pins (N-CH MOSFET gate) can be driven high and low (PC1, PC3, PC5, PA6) Can’t draw a load when disabled, can when enabled etc. Verify the analog read of the current sense amplifier outputs (PC0, PC2, PA5, PA7) Verify the reading, matches expected and matches what you measure with mulitmeter Record the results Verify the analog read of the VBAT rail (PC4) |
5V Power:
Electrical | Firmware |
---|---|
Verify enable condition on all 4 switches can draw load from the output when enabled, can’t otherwise Verify output current limit (2A) Verify the OC pin goes low in this condition | Verify the enable pins can be driven high and low (PC14, PC11, PB9, PD2) Verify the STM can read the state of the OC pins accurately (PC13, PC12, PC10, PB8) Verify the analog reads of both of the 5V rails (PA1, PA4) |
17V Power
Electrical | Firmware |
---|---|
Verify the 17V output can be enabled and disabled vis N-CH FET can draw load from the output when enabled, can’t otherwise Verify the analog output of the amplifier matches expectations Record the results: at 2A, 1.07V was measured Verify the TVS diode function protects against an oversimplification of signal | Verify the enable pin (N-CH MOSFET gate) can be driven high and low (PB2) Verify the analog read of the current sense amplifier output (PB1) Verify the analog read of the 17V rail (PB0) |
Changes for Next Rev:
Problems | Feature Additions/Changes |
---|---|
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