PCB Layout Review Template

This page is meant to provide a list of things that should be checked when reviewing the layout for a PCB. It is the designer’s responsibility to check for ALL of the things below themselves, then assign others to review their layout and ensure the changes required are made before sending the board off to be fabricated.

Generic Layout Review Sections

Design-For-Manufacture (JLCPCB) (<Reviewer Name>)

Ensures the PCB layout is in line with the capabilities of JLCPCB. If the board will be manufactured elsewhere, this section should be modified to fit the manufacturer’s capabilities. The capabilities of JLCPCB are listed here: https://jlcpcb.com/capabilities/Capabilities

When reviewing this section, instead of checking everywhere on the board, just make sure the design rules match what is on the manufacturer’s website, and the Design Rule Check reports no violations. Ensure the following sections are OK in the design rules:

Drill/hole size
Minimum annular ring
Minimum clearance
Minimum trace width and spacing
Solder mask

General Guidelines (<Reviewer Name>)

General things to be aware of when reviewing the layout.

Decoupling capacitors are placed as close as possible to the parts they are decoupling. If multiple caps are used, place them closest from smallest capacitance to largest capacitance
No polygons are shelved, and all are repoured
No dead copper from any polygons
Thermal reliefs used for all parts, except for parts carrying high amounts of current - allows for easier rework
0805 components and smaller have copper balancing (copper connected to one pad is less than 2x the copper connected to the other pad) - this helps prevent tombstoning while soldering
No traces routed underneath inductors, unless it is on a different layer with a GND plane in between
Do not place small components (i.e. chip resistors/capacitors) next to very tall components (i.e. connectors) - make at least 1mm of space
Double check mounting holes are included if necessary (work with mech. team to determine if they are wanted)
No components underneath other components (check 3D body clearance in 3D view)
Ensure 0.5mm clearance from all mounting holes (set this up in your design rules)

Silkscreen (<Reviewer Name>)

All silkscreen is TrueType Arial font, with a minimum text height of 50mil
Text block that includes the board name, revision, designer name(s), and completion date (month and year) is included on the silkscreen
UW Robotics Team logo is included on the silkscreen
No vias over silkscreen
No silkscreen under components or over exposed copper (i.e. pads)
All components have their designators visible on the silkscreen
Check that all vias are tented

Routing & Pours (<Reviewer Name>)

Avoid overlapping polygons. Overlapping polygons of the same net should be merged into one
No angles < 45 degrees
Traces are routed without any acute angles. Avoid 90 degree angles as well if possible
Differential signals are routed properly with length-matching
For signals with controlled impedance, trace width and spacing are calculated using an impedance calculator
If going with JLCPCB, use their Impedance Calculator
When moving high-speed/differential signals between layers, surround the vias with GND vias

Connectors (<Reviewer Name>)

Verify enough space around connectors for mating
Double check pinout will match destination connector - be especially careful here, as the pinout may need to reversed if the connectors are facing different directions
Connector purpose and pinout (if necessary) is detailed in the silkscreen

Design-for-Test (<Reviewer Name>)

Specific Layout Sections for Review

Other Parts of the Layout (<Reviewer Name>)