Intro to Communication Protocols

(Ported from this document, originally on Google Docs)

Communication Protocols

Synchronous vs. Asynchronous protocol

Synchronous communication protocols use a clock signal, which is a signal that oscillates between logic high and low at a very precise and constant rate, to synchronize the data transmission with the clock signal. When the data is synchronized with the clock signal, as long as the clock signal is uniform throughout the communication, devices can communicate with each other without requiring an extra transceiver to parse the signal.

Full Duplex vs. Half Duplex

Half duplex is when a communication protocol only allows one device at a time to transmit signal to other device(s). I2C, which will be discussed below, is a common example of half-duplex communication protocol, as devices sharing a single data line (SDA) wait for their turn to transmit signal. In half duplex communication protocols, devices must wait for other devices to end their transmission to use the data line.

On the other hand, full duplex is when a communication protocol allows devices to receive & transmit signals at the same time, not having to wait for other devices to use the signal line. Full duplex communication requires separate receiving and transmitting lines so that devices can send signals whenever they want through their own line.

Master vs. Slave

In serial communication, master refers to a device that initiates the communication, and slave refers to devices that respond to master’s signal to receive and transmit data. Mostly, only master device has control over when would the communication take place and what to communicate. 

UART - Universal Asynchronous Receiver/Transmitter

  • UART is not referring to a communication protocol, but a type of transceiver that communicates with each other using serial communication protocol
  • Serial communication refers to data transmitted in a single data line in series, or sequentially. 
  • UART receives parallel signals from the processor and translates them into a serial signal, which is transmitted to the other device. A receiving UART then parses a serial signal into parallel signals and transmits along the parallel data lines.
  • The gap between each high and low signal is determined by a specific baud rate that must be common between the two devices involved in serial communication with in 10% tolerance.


Data Packet Structure

UART’s transmission line is normally high, and each data packet is transmitted with a start bit that pulls the transmission line low, and end bits that brings the transmission line high.

Also, UART’s serial communication has a special bit called parity bit. Parity bit is a simple error checking bit that saves whether the data is even or odd at the transmitter, and checks if the data is still even or odd at the receiver, in case the data bit is distorted due to noises.

1 bit 

Start

5-9 bits

Data

0-1 bit

Parity

1-2 bits

Stop


Pros and Cons

Pros

Cons

  • Parity bit supports error checking
  • Only 2 wires are used without clock
  • Very common and universal
  • data can be customized between 5-9 bits
  • Maximum data frame for each packet is limited to 9
  • 1:1 communication only
  • Baud rate must be consistent within 10% tolerance


SPI - Serial Peripheral Interface

  • Synchronous full-duplex communication protocol that allows a single master with multiple slaves
  • It uses 3 basic signal lines, SCK (Clock), MOSI (Master output -> slave input), MISO (Master input <- slave output), along with SS/CS (slave select or chip select) line.
  • The master device would have as many SS/CS lines as there are slaves connected to the master. In SPI, SCK & SS lines are controlled by the master to choose which slave device to communicate with and what to do with that slave device.
  • By pulling the SS line of the desired slave device low, master device initiates communication with the selected slave device.
  • Data signal is simple and continuous logic high’s and low’s.


Pros and Cons

Pros

Cons

  • Slave selecting is very simple
  • Higher data transfer rate due to wider bandwidth
  • Separate MOSI and MISO lines allowing full duplex function
  • No start and stop bits, continuous transfer of data allowed
  • Only one master
  • Uses 3 + n wires, which can become problematic with more slaves
  • No ACK bit to check a successful transfer of data (will be discussed in I2C section)
  • No error checking bit like UART


I2C - Inter-Integrated Circuit

  • Synchronous, half-duplex communication protocol that allows multiple master and slave in the bus
  • Uses only 2 wires for communication: SDA (data), SCL (clock)
  • Master devices select slave device by integrating address of the slave device into the daga signal.
  • Some devices support clock stretching function, which is basically giving the slave devices an ability to delay the clock pulse when it’s not ready to read data yet.


Data Packet Structure

I2C’s data packet includes start and stop bit just as UART’s serial communication, but the starting and stopping condition is not a simple logic high to low transition. First, keep in mind that idle state is high for both SCL and SDA.

Start: SDA is pulled low when SCL is in idle (high) state. Clock signal begins following the start condition. When two master devices want to transfer data at the same time, first one to pull the SDA low takes the priority.

Stop: SCL goes to idle state, and SDA is pulled high, while SCL remains idle.

Repeated start: when SDA is pulled high before SCL goes to idle state, SDA can trigger the start condition again without ending the transfer, called repeated start. This allows master to transfer several messages in one go.

Read/Write: after address frame, master chooses whether to write data to the slave or request(read) data from the slave through this bit. High -> read, Low->write.

ACK/NACK: after address frame and each data frame, the slave is given control over SDA line for one bit, so that it can pull the 9th bit down to low in order to indicate that data was successfully received by the slave. If the ACK bit is left high (also known as NACK state), master device can infer the data transfer was unsuccessful.

Start Condition

Address

7 bits

Read/Write

1 bit

ACK/NACK

1 bit

Data

8 bits

ACK/NACK

1 bit

Repeated Start


More Data & ACK/NACK bits

Stop

Condition






Pros and Cons

Pros

Cons

  • Only two lines needed to communicate
  • Multiple masters and slaves
  • ACK/NACK checking
  • Devices must take turns to communicate
  • Masters cannot communicate directly with each other
  • Smaller bandwidth


Hardware Configurations: Push-pull vs. Open drain

Now that we talked about software and data structure aspects of basic communication protocols, we should talk about the physical structure of the data lines.

Push-pull output

This is a simplified structure of push-pull output configuration. This configuration only allows to output signal to the data line. Example for this type of configuration will be MOSI and MISO lines of SPI. The internal signal from the IC would send high or low signal to a pair of FETs, PMOS and NMOS, either supplying VDD voltage to the data line or pulling the line to the ground. Since this configuration is constantly driven to high or low state by VDD or GND, the generated output signal provides a good performance in terms of slope of the digital signal.

Open Drain

This is a simplified open drain output configuration. The open drain can be used in two way communication, but it requires a bit more complicated circuit involving diodes and this will be enough to explain how output is generated. Notice that this output configuration requires an external pull-up resistor for it to provide logical high on the receptor side, unless the circuit will end up generating floating point. Vin from the internal circuit will activate and deactivate the transistor, either pulling the data line low or letting the external voltage source to pull the data line high, just as a switch with pull-up resistor. 

One drawback of open drain method is that the pull-up resistor undesirably behave as a low pass filter, causing a slower rise of digital signal. A picture below shows the effect of pull-up resistor to signal condition.

You also have to consider the tradeoff between power consumption and noise interference when choosing a pull-up resistor value. The larger the resistor value, the less the power consumption will become, due to reduced current flow, but the low current along the line will make the signals more susceptible to external noises.

CAN Bus - Controlled Area Network

Very robust, automotive standard communication protocol commonly used in automotives. One of its most remarkable property is differential pair signaling.

Differential Pair Signaling

Differential pair, in short, refers to a way of transferring signals using a pair of signals that are equal to each other but opposite in polarity. The picture below describes how differential pair uses opposite polarity to maintain the input pulse while filtering out the noises.

On a physical level, differential pair signals are supposed to be “coupled”, meaning the signals traces should be as close to each other as possible and wires should be twisted. The purpose of this coupling is to provide both signal traces or wires with the same impedance or noises so that they can be cancelled out from the transceiver.

Also, differential pairs require termination resistors at both ends of the transmission line which should match the characteristic impedance of transmission lines, which can be found in the wire’s datasheet. Basically what a terminating resistor does is to “soak up” a wave of signal created by the transmission line so that it wouldn’t cause a reflection of signal on the bus, which would seriously damage the signal integrity. (More about characteristic impedance and what causes “reflection” can be found here

Other common protection devices

  • TVS Diode - TVS diodes, which stands for transient voltage suppression diodes, responds to voltage spikes, aka transient voltages, that can easily damage sensitive components on the circuit to provide an alternate pathway for the transient noise to be grounded.
  • Common mode choke - it is a coupled inductor that produces high impedance to common mode noise but zero impedance to differential mode noise, which is ideal for differential pair devices such as CAN


Also, CAN, as it is an asynchronous communication protocol, requires transceivers on both receiving and transmitting sides of the signal.

PROTOCOLS: UART - I2C - SPI - Serial communications